SRAM Cell Area Calculator
Work out sram cell area instantly with clear inputs, formula shown and shareable results.
About SRAM Cell Area Calculator
SRAM cell area scales roughly with the square of the node but with a coefficient that has grown at recent nodes as patterning and variability limits bite. High-current and 8T cells trade 25-40% more area for speed or low-voltage operation, and array efficiency of 65-75% covers the periphery.
Formula
SRAM macro area
cell area approx k x node^2; macro area = capacity x cell area / array efficiency
Worked example
With the default values below, SRAM Cell Area Calculator returns Macro area of 0.94. Change any input above and every figure here is recalculated in your browser.
Inputs used
- Process node
- 7 nm
- Cell typeone of High density (6T), High current / performance, Low voltage (8T)
- High density (6T)
- Capacity
- 32 Mbit
- Array efficiency
- 70 %
Results
- Macro area
- 0.94 mm²
- Cell area
- 0.02058 µm²
- Bits per mm²
- 34.01 Mbit/mm²
- Cells for a 256-bit word
- 256 cells
Step by step
- 1Values used
- 2SRAM macro area
- 3Macro area= 0.94 mm²
- 4Cell area= 0.02058 µm²
- 5Bits per mm²= 34.01 Mbit/mm²
- 6Cells for a 256-bit word= 256 cells
Assumptions and limits
- The result is derived only from the 4 inputs listed above. Anything not among them is not part of the calculation.
- In particular, this calculator does not take inflation, tax, fees or charges or compounding frequency into account.
- Figures are rounded for display to 5 decimal places, so totals built from several rounded parts can differ slightly from the unrounded arithmetic.
How these calculators are built and tested is described on the Methodology page. If a figure looks wrong, please report it.
Frequently Asked Questions
Why has SRAM stopped scaling well?
The 6T cell relies on carefully balanced transistor strengths, and random dopant and pattern variation at small dimensions forces larger cells to keep read and write margins.
When is an 8T cell worth it?
When low-voltage operation matters. Separating the read port removes the read-disturb constraint, allowing operation several hundred millivolts lower.
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